Faculty Profile
Dr. R.Jayagowri
Professor & HOD
Ph.D
rjayagowri.ece@bmsce.ac.in
Research Interests: VLSI Design for Testability , Low power VLSI architecture design, VLSI Digital signal processing, Static Timing Analysis and Physical Design.
About
She pursued her Ph.D degree in the field of Low power VLSI Testing from Jawaharlal Nehru Technological University, Hyderabad. She received her M.E degree in Applied Electronics from the college of Engineering Guindy, Anna university, Guindy, Chennai, India. She received her BE degree in Electronics and Communication Engineering from Bharathidasan University, Trichy, Tamilnadu, India.
She has over 26 years of teaching experience working in different organization like VIT- Vellore, RV-VLSI, KS institute of Technology etc... Taught different subjects in the domain of VLSI, also trained the corporate fresher from NXP semiconductors and Honeywell for ASIC design.
She has eager to research and innovate in her interested research area of VLSI Testing and Testability, Low power VLSI architecture design, VLSI Digital Signal Processing, Static Timing Analysis and Physical Design. With this interest she could able to publish her research papers in different reputed conferences and journals which includes IEEE transactions, Springer Nature, Taylor and Francis, Elsevier e-journals.
Her interest in innovations turned out with two granted Indian patents. Her Interactive class room teaching method and project guidance capability fetched all India level and state level awards for her student projects.
As an achievement won the Best teacher award, best technical paper award. Along with students won the “Winner award in bachelor category in All India cadence design contest -2012”, “Project of the year-Karnataka-2012” award, “Top 7 of national category- bachelor level cadence design contest-2013”. She contributed as a consultant to solve some of the industry related research problem for semiconductor based industry. She involved in corporate training for fresher of few semiconductor industries.
Her interest towards contributing to the semiconductor learner/ student community motivated her to author VLSI related books titled as “Analog and Mixed Mode VLSI design” and “Static Timing Analysis”. She is an active contributing committee co-chair and member of Technical conferences like International Test conference (ITC-INDIA), IEEE CONNECT, IEEE WINTECHCON etc., . She is a senior member IEEE, Life member of IETE and ISTE.
Education
Selected Publications
Other Information
1. Indian patent for invention granted : “1PIXEL/1CLOCK THROUGHPUT MODIFIED MEDIAN ADAPTIVE PREDICTOR FOR VESA DSC ENCODER” bearing the
patent number-347212 for the term of 20 years.
patentee and Inventors: 1.RAMAMOORTHY JAYAGOWRI 2.MAITHRI UDAYA KUMAR KENJOOR SHETTY
2. Indian patent for invention granted: “A SCAN ARCHITECTURE AND A METHOD OF SCAN BASED TESTING TO REDUCE SHIFT OPERATIONS THEREBY REDUCING SHIFT POWER DURING SCAN TESTING” bearing the
patent number-400759 for the term of 20 years.
Patentee: 1.BMS COLLEGE OF ENGINEERING 2.RAMAMOORTHY JAYAGOWRI 3.SHISHIRA SHETTY KENJUR SUBHASHCHANDRA 4.SRIJANA SHANKARANAND LALI
3. Registered Copyright titled “IMPROVED TEMPOGRAM BASED IMAGE TEXTURAL DESCRIPTORS FOR VOICE DISORDER DETECTION” with Registration Number: L-136901/2023 on 29/11/2023 by Copyright office, Government of India. Applicant: BMSCE, Authors: ROOHUM JEGAN, R JAYAGOWRI
4. Registered Copyright titled “ENHANCED GAMMATONE CEPSTRAL COEFFICIENTS FOR VOICE PATHOLOGY DETECTION USING DECISION TREE AND K-NEAREST NEIGHBOURS' CLASSIFICATION.” with Registration Number: L-133046/2023 on 14/9/2023 by Copyright office, Government of India. Applicant: BMSCE, Authors: ROOHUM JEGAN, R JAYAGOWRI
5. Completed consultancy work "Develop a micro-architecture for MMAP predication algorithm for the DSC2.0 Specification" with Ignitarium Technology solutions pvt., Ltd.,
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