Dr. RAJATH VASUDEVAMURTHY

Dr. RAJATH VASUDEVAMURTHY

Assistant Professor

Doctor of Philosophy

rajathv.ece@bmsce.ac.in

Research Interests: VLSI Circuits and Systems, Design for Testability, Digitally Assisted Analog Design, Time Measurement

About

Having completed my doctoral thesis titled “Time-based All Digital Technique for Analog Built-in Self-Test” at the Indian Institute of Science; I served as a Post-Doctoral Researcher for one year at the Pennsylvania State University (PSU), USA and as a visiting researcher for seven months at the Department of Signal Processing at the Royal Institute of Technology, KTH, Stockholm, Sweden. I worked on circuit design using Tunnel FETs at PSU and on time meaurement using FPGAs at KTH. I am interested in pursuing research in digitally assisted analog circuit design and approximate computing using analog circuits besides automated testing of analog circuits. I plan to teach courses in the VLSI domain for undergraduate and post-graduate programmes.

Education

  • Doctor of Philosophy - Electrical Communication Engineering (VLSI Circuits and Systems)
    Indian Institute of Science
    Passed Year: 2014 | Program Type: FullTime
  • Bachelor of Engineering - Electronics and Communication
    R. V. College of Engineering / Visvesvaraya Technological University
    Passed Year: 2007 | Program Type: FullTime

Selected Publications

  • Book Chapter or Books | Published On : 15-01-2018
    Rajath Vasudevamurthy
    Book Chapter: "Sastra-an impediment to progress?" in Sastra-s through the lens of Western Indology – A Response, Edited by Prof. K.S.Kannan.
    Weblink
  • Patents | Published On : 03-04-2014
    Rajath Vasudevamurthy and Bharadwaj Amrutur
    System and method for built-in self test (bist) in an integrated circuit
    Weblink
  • Journal | Published On : 01-02-2014
    Rajath Vasudevamurthy, Pratap Kumar Das and Bharadwaj Amrutur
    "Time-Based All-Digital Technique for Analog Built-in Self-Test," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 2, pp. 334-342.
    Weblink
  • Conference | Published On : 07-01-2013
    Rajath Vasudevamurthy and Bharadwaj Amrutur
    "Multiphase Technique to Speed-up Delay Measurement via Sub-sampling," 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems, Pune, India, 2013, pp. 185-190.
    Weblink
  • Journal | Published On : 01-12-2011
    Bharadwaj Amrutur, Pratap Kumar Das and Rajath Vasudevamurthy
    "0.84 ps Resolution Clock Skew Measurement via Subsampling," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 19, no. 12, pp. 2267-2275.
    Weblink
  • Conference | Published On : 18-05-2011
    Rajath Vasudevamurthy, Pratap Kumar Das and Bharadwaj Amrutur
    "A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test," 2011 IEEE International Symposium of Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, 2011, pp. 2035-2038.
    Weblink

Other Information

I am also interested in understanding the intellectual tradition of the Indian civilization.

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